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Posted: 1/23/2002 3:46:42 PM EDT
[Last Edit: 1/23/2002 3:48:05 PM EDT by Kalifornia]
How do I make a circuit using 3 transistors each to make an AND gate and an OR gate? It makes no sense to me when I look at a NOR or NAND gate. A NOR gate looks like an OR gate and a NAND gate looks like an AND gate. WTF? Your help is greatly appreciated!
Link Posted: 1/23/2002 4:09:58 PM EDT
A NOR gate is the cobination of an OR gate, and a NOT gate. Similarly, the NAND gate is a combo of an AND gate and a NOT gate. The NOT gate looks like a triangle with a small circle at the tip. The NAND and NOR gates look like AND and OR gates respectively, but with the circle at their tip. Are you talking about designing the acutal circuit, or just the schematic?
Link Posted: 1/23/2002 5:03:01 PM EDT
I need to design both an AND gate and OR gate using 3 circuits for each. I am stuck right now trying to figure it out.
Link Posted: 1/23/2002 5:06:22 PM EDT
Link Posted: 1/23/2002 5:09:56 PM EDT
STOP! You're making my head hurt.
Link Posted: 1/23/2002 5:42:06 PM EDT
[Last Edit: 1/23/2002 5:47:44 PM EDT by hard-case]
Originally Posted By Kalifornia: I need to design both an AND gate and OR gate using 3 circuits for each. I am stuck right now trying to figure it out.
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Check out these links. They show how to represent a logic gate using circuits...... [url]http://www.nottingham.ac.uk/~cczwood/logic/logic-intro.html[/url] [url]http://www.williamson-labs.com/480_logic.htm[/url] It could be worse....I learned this on solderless breadboards, with a guy who's explanation of building circuits went something like 'okay...the goeszouta goeszinta the goeszinta of this goeszouta here'......those were the days...
Link Posted: 1/23/2002 5:45:41 PM EDT
For an inverter, take an NPN transistor, the input goes through a resistor to the base. The emitter is grounded. The output is the collector, and must also have a resistor between the collector and + power supply. For a NOR gate, add a second transistor in parallel with the inverter transistor. For a NAND gate, put a second transistor in series with the inverter transistor. Combine a NAND with an inverter for a AND gate. Combine a NOR with an inverter for an OR gate. Remember that when the inputs go high, the transistor turns on, current flows through the resistor to make the output go low.
Link Posted: 1/23/2002 6:15:11 PM EDT
And by all means Kalifornia, remember: 1) Mares eat oats 2) Does eat oats 3) Little lambs eat ivy
Link Posted: 1/23/2002 6:34:05 PM EDT
Originally Posted By jesterdog: And by all means Kalifornia, remember: 1) Mares eat oats 2) Does eat oats 3) Little lambs eat ivy
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This is why I like AR15.com. Topics range from Digital Logic Design to Animal Husbandry, and everything in between. Sometimes in the same thread...
Link Posted: 1/23/2002 7:07:16 PM EDT
Originally Posted By Kalifornia: How do I make a circuit using 3 transistors each to make an AND gate and an OR gate? It makes no sense to me when I look at a NOR or NAND gate. A NOR gate looks like an OR gate and a NAND gate looks like an AND gate. WTF? Your help is greatly appreciated!
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A NOR gate is an OR gate, only with an inverted output, and the same for a NAND gate. You could also use DeMorgans theorum to create a NAND or NOR gate using inverted inputs. If you haven't memorized it yet you'll need to in the future- [b]The complement of a product of variables is equal to the sum of the complements of the variables.[/b] Basically a NAND gate is equivalent to an OR gate with inverted inputs- not AB is equal to not A + not B. Also a NOR gate is equivalent to an AND gate with inverted inputs- A plus B not is equal to not A plus not B. Now let's move on to XOR & XNOR On second thought, I've already been doing this stuff for 13hrs today. We'll save that lesson for tomorrow. [}:D]
Link Posted: 1/23/2002 7:09:05 PM EDT
[Last Edit: 1/23/2002 7:10:35 PM EDT by subvertz]
Inverters my man, inverters. Yeah, better not confuse him with the exlusives.
Link Posted: 1/23/2002 7:25:34 PM EDT
[Last Edit: 1/23/2002 7:26:44 PM EDT by trickshot]
The only thing I can remember offhand is you can make a NOT gate by tying the inputs of an AND gate. We used to have to make all the combinations just using AND gates. I did well in that class, but it was many moons ago now. Still have the textbook and workbook buried in a closet someplace. hard-case got the answer right for you--NAND just inverts the normal output of an AND Input A Input B AND NAND OR NOR 0 0 1 0 0 1 0 1 0 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0 Make sense now? I hope I did this chart right or I'll look really stupid... sorry about the spacing, it looked good when I edited it.
Link Posted: 1/23/2002 7:37:34 PM EDT
Originally Posted By trickshot: The only thing I can remember offhand is you can make a NOT gate by tying the inputs of an AND gate. We used to have to make all the combinations just using AND gates. I did well in that class, but it was many moons ago now. Still have the textbook and workbook buried in a closet someplace. hard-case got the answer right for you--NAND just inverts the normal output of an AND Input A Input B AND NAND OR NOR 0 0 1 0 0 1 0 1 0 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0 Make sense now? I hope I did this chart right or I'll look really stupid... sorry about the spacing, it looked good when I edited it.
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Your AND column is NXOR, the NAND column is XOR. OR and NOR are correct.
Link Posted: 1/23/2002 7:39:20 PM EDT
[Last Edit: 1/23/2002 7:40:10 PM EDT by trickshot]
How's this? A B AND OR 0 0 0 0 0 1 0 1 1 1 1 1 1 0 0 1
Link Posted: 1/23/2002 7:55:28 PM EDT
Yes!
Link Posted: 1/23/2002 8:08:52 PM EDT
An OR Gate goes high when any of the inputs is high. Otherwise it is low. An AND Gate only goes high if all inputs are high. Otherwise it is low. A NOR Gate goes high unless any of the inputs are high, then it goes low. A NAND Gate stays high unless all the inputs go high, then it goes low. A NOT Gate (Invertor) goes high if the input goes low and vice-versa. An XOR Gate goes high when any of the inputs is high, except if all inputs go high, then it goes low. An XNOR Gate goes low when any of the inputs go high, except if all inputs go high, then it goes high. You can also invert the inputs to change a gate from one type to another. An OR Gate has less Delay/Latency than an AND Gate and therefore a system built with an OR Gate that is inverted should be faster thasn one built with an AND Gate. If you leave any of the inputs unattached, a TTL OR Gate will interpret the unattached inputs as being high. A TTL AND Gate will interpret them as low. TTL Means Tarnsitor-to-Transistor Logic or what you are designing.
Link Posted: 1/23/2002 8:11:29 PM EDT
[img]http://www.williamson-labs.com/images/and-or.gif[/img]
Link Posted: 1/23/2002 8:13:36 PM EDT
[Last Edit: 1/23/2002 8:28:53 PM EDT by cc48510]
Here are the schematics you would need with somewhat of an explanation: [url]http://tech-www.informatik.uni-hamburg.de-END Of Applet Attempt-
s/cmos/cmosdemo.html[/url] ARGHHH, the danged board is trying to convert the address into HTML Code. So here is it in plain text: http://tech-www.informatik.uni-hamburg.de-END Of Applet Attempt-
s/cmos/cmosdemo.html Damn, that won't work either. Let's try this. Delete the tilde: http://tech-www.informatik.uni-hamburg.de/app~lets/cmos/cmosdemo.html
Link Posted: 1/23/2002 8:17:13 PM EDT
I like pie. Apple pie AND cherry pie OR peach pie NAND pecan pie NOR sweet potato pie XOR pumpkin pie XAND blueberry pie. Thank you for reading.
Link Posted: 1/23/2002 8:21:51 PM EDT
Originally Posted By MadMatt:
Originally Posted By jesterdog: And by all means Kalifornia, remember: 1) Mares eat oats 2) Does eat oats 3) Little lambs eat ivy
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This is why I like AR15.com. Topics range from Digital Logic Design to Animal Husbandry, and everything in between. Sometimes in the same thread...
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Animal husbandry?? Must be in the Babes of the Day thread.
Link Posted: 1/23/2002 8:45:19 PM EDT
Originally Posted By Kalifornia: How do I make a circuit using 3 transistors each to make an AND gate and an OR gate? It makes no sense to me when I look at a NOR or NAND gate. A NOR gate looks like an OR gate and a NAND gate looks like an AND gate. WTF? Your help is greatly appreciated!
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Did you get it done yet? If not I can email you a schematic for it tomorrow.
Link Posted: 1/23/2002 9:44:55 PM EDT
I have to admit that I am [i]very[/i] new the digital logic having only one college course over the subject and currently beginning enrolled in another; however, I think I have spotted what may be a slight incongruity. A AND gate is actually a NAND gate with an inverter [b]not[/b] the other way around. Complimentary, a OR gate is a NOR gate with an inverter. In fact, I have a quiz/assessment test over Boolean Algebra tomorrow. The damn class is selfpaced, and it is NOT the easiest stuff I've ever learned. -Matt
Link Posted: 1/23/2002 9:56:26 PM EDT
Originally Posted By Magnus357: I have to admit that I am [i]very[/i] new the digital logic having only one college course over the subject and currently beginning enrolled in another; however, I think I have spotted what may be a slight incongruity. A AND gate is actually a NAND gate with an inverter [b]not[/b] the other way around. Complimentary, a OR gate is a NOR gate with an inverter. In fact, I have a quiz/assessment test over Boolean Algebra tomorrow. The damn class is selfpaced, and it is NOT the easiest stuff I've ever learned. -Matt
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It depends how you look at it. ANDs and ORs are easier to to understand, but NANDs and NORs require fewer transistors to actually fabricate. So in practice, NANDs and NORs are used.
Link Posted: 1/23/2002 10:18:42 PM EDT
Thanks for all the help guys. I think I just about got it. I memorized DeMorgan's Laws about a year ago in a discrete structures course. I am taking a Computer Architecture course and need to design these things from now on and prove them by a truth table, K-map, axioms, etc... This class is pretty fun, but you have to think about what you're doing or you'll get into trouble. I'll get a pic of the circuit I made before I turn it in (just on paper, not an actual one). Thanks again.
Link Posted: 1/23/2002 10:34:12 PM EDT
It depends how you look at it. ANDs and ORs are easier to to understand, but NANDs and NORs require fewer transistors to actually fabricate. So in practice, NANDs and NORs are used.
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Now with FPGA's everything gets reduced to AND’s and OR’s. Kalifornia Boolean algebra has nothing to do with making gates out of transistors; that is an analog problem. Have you had an electronics class or any non-linear classes? What school do you go to? 10x
Link Posted: 1/23/2002 10:53:51 PM EDT
Originally Posted By Wombat:
It depends how you look at it. ANDs and ORs are easier to to understand, but NANDs and NORs require fewer transistors to actually fabricate. So in practice, NANDs and NORs are used.
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Now with FPGA's everything gets reduced to AND’s and OR’s.
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I stand corrected. My personal perspective is from making custom mixed analog and digital ICs, where we have to squeeze in relatively simple digital logic in various places on our chips. So working with a handfull of transistors at a time is still the way to go.
Link Posted: 1/23/2002 11:11:44 PM EDT
You think this is hard? Try writing a search engine interface that uses boolean logic. Then try explaining to non-engineers how it works. Boolean logic is very counter-intuitive--with text, does "AND" always mean both terms? Most people expect the results to show one or the other or both. They don't understand that the engine compares their terms to the contents of documents that have been indexed. If you say AR15 and AR10, you won't get any documents that have AR15 in them unless they also have AR10 in them. See the problem? It is logically correct, but not what people expect. Does "OR" mean that you want one or the other? Many people think "OR" means the same thing as "AND". But if I say AR15 or AR10, I'll get all the docs containing AR15 and AR10 and both terms, which is more than expected. I probably just wanted all the docs with AR15 and all the docs with AR10. The way we talk is different than boolean. Pretty funny that I got that table wrong! If some people knew that, I'd never live it down.
Link Posted: 1/23/2002 11:30:17 PM EDT
I stand corrected. My personal perspective is from making custom mixed analog and digital ICs, where we have to squeeze in relatively simple digital logic in various places on our chips. So working with a handfull of transistors at a time is still the way to go.
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For making custom stuff you should look into FPGA's. You can get them big enough to make microprocessors and smaller PLA's are great for small digital blocks in mixed circuits. Every time I tried doing digital stuff with transistors I would end up with a handful in a block and then need to use that block 20 times. The thought of making test boards with a couple hundred transistors dose not sound like fun to me. With FPGA’s you need only a couple chips and your done. What kind of IC’s does your company make?
Link Posted: 1/23/2002 11:33:26 PM EDT
[Last Edit: 1/23/2002 11:35:46 PM EDT by cc48510]
You want the documents regarding the AR-15 XOR the AR-10. That way you only get the documents relating to the AR-15 or the documents relating to the AR-10, but none relating to both. Boleean Algebra is the Algebra used when working with logic gates. _____ -      - A + B = C = A * B This is usefull in that an AND Gate is also a NOR Gate with Inverted Inputs.
Link Posted: 1/24/2002 3:29:57 AM EDT
Originally Posted By Magnus357: I have to admit that I am [i]very[/i] new the digital logic having only one college course over the subject and currently beginning enrolled in another; however, I think I have spotted what may be a slight incongruity. A AND gate is actually a NAND gate with an inverter [b]not[/b] the other way around. Complimentary, a OR gate is a NOR gate with an inverter. In fact, I have a quiz/assessment test over Boolean Algebra tomorrow. The damn class is selfpaced, and it is NOT the easiest stuff I've ever learned. -Matt
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Matt- You are correct in a round about way. Let's say you have an OR gate and you put an inverter on the output, now you have a NOR gate. If you put another inverter in series then you turn it back into an OR gate. In reality there are only three types of gates: AND, OR & the Inverter. All other gates are made from these three in one form or another excluding buffers. I enjoyed Digital I & II, it was initially the second half of AC Circuits that I really hated. It took me forever to remember all of those stupid formulas. I'm glad it went through it all now though......
Link Posted: 1/24/2002 4:01:07 AM EDT
No wonder the anti's are afraid of us..... Y'all are scary.
Link Posted: 1/24/2002 5:07:56 AM EDT
You want the documents regarding the AR-15 XOR the AR-10. That way you only get the documents relating to the AR-15 or the documents relating to the AR-10, but none relating to both.
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In English we use the expression "either...or" to mean the same thing. [;D]
Link Posted: 1/24/2002 7:48:44 AM EDT
kids'll eat ivy too, wouldn't you? dang, you guys shore are smart!!!
Link Posted: 1/24/2002 10:38:02 AM EDT
[Last Edit: 1/24/2002 10:39:20 AM EDT by Kalifornia]
OK. I got them done (so easy). I just wasn't thinking right. The AND gate looks like: Vcc________/ ________/ ________Vout The OR is: Vcc_______/ _____ |___Vout ______/ ______| Duh!!!
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