Posted: 10/22/2008 12:32:11 PM EDT
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I am having a hell of a time with this midterm and hoping some one can help me. I need to design a npn transistor based amplifier. The specs I was given are as follows. Cut off 18 VDC IC Saturated 20 mA Beta dc 100 IE=IC+IB Q Point 9v 10 mA Input and output capacitor 10uf Bypass capacitor 100 uf Input 100mVrms 1500 Hz AV between 5 or 6 Stiff amplifier If you could help me out I would appreciate it. Even more so if you can explain how to start and work through it. It's had me stumped for the past two days. |
I'm a non-practicing computer engineer that was heavy into electrical engineering. I'll try to get started here  The capacitor values are straight forward guidelines. Put a 10uf cap on the input and output. You will need the correct type of cap for the frequency response you need. A DC bypass cap of 100uf with the right chemistry as well (not electrolytic). the 1500 Hz input should be your guide when picking out caps. I'm sorry I suck. Thats about all I can remember  I used to really like doing this kind of stuff. I miss the good ol' days when me and friends would play endlessly with this stuff in college. -Foxxz |
You want the collector resistance to be biased at 9V at 10mA -> Rc = 900 ohms You want the collector resistance to be 5 to 6 times the emiter resistance -> Re = 150-180 ohms Since the transistor is carrying 10mA and has a beta of 100, the base is consuming 0.1 mA of current. A voltage divider between power and ground with a mid-point of 0.7 V while supplying 0.1 mA is required to bias npn. You will be OK with 1MA of current through a voltage divider: 18 V to be divided -> 18K ohm. 18-0.7 = 17.3 -> you want a 17.3K ohm between +18 and base and 700 ohms between base and ground. Cap between input and base, Cap between collector and output Cap between +18 and ground Presto, done. |
I think you might want to re-vist your base biasing..... Jus' sayin'..... |